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EL5123, EL5223, EL5323, EL5423
Data Sheet March 20, 2002 FN7176
12MHz 4, 8, 10 & 12 Channel Rail-to-Rail Input-Output Buffers
The EL5123, EL5223, EL5323, and EL5423 are low power, high voltage rail-to-rail input/output buffers designed primarily for use in reference voltage buffering applications for TFT_LCDs. They are available in quad (EL5123), octal (EL5223), 10-channel (EL5323), and 12channel (EL5423) topologies. All buffers feature a -3dB bandwidth of 12MHz and operate from just 600A per buffer. This family also features fast slewing and settling times, as well as a continuous output drive capability of 30mA (sink and source). The quad channel EL5123 is available in the 10-pin MSOP package. The 8-channel EL5223 is available in both the 20pin TSSOP and 24-pin LPP packages, the 10-channel EL5323 in the 24-pin TSSOP and 24-pin LPP packages, and the 12-channel EL5423 in the 28-pin TSSOP and 32-pin LPP packages. All buffers are specified for operation over the full -40C to +85C temperature range.
Features
* 12MHz -3dB bandwidth * Supply voltage = 4.5V to 16.5V * Low supply current (per buffer) = 600A * High slew rate = 15V/s * Rail-to-rail input/output swing * Ultra-small packages
Applications
* TFT-LCD drive circuits * Electronics notebooks * Electronic games * Touch-screen displays * Personal communication devices * Personal digital assistants (PDA) * Portable instrumentation * Sampling ADC amplifiers
Ordering Information
PART NO EL5123CY EL5123CY-T7 EL5123CY-T13 EL5223CL EL5223CL-T7 EL5223CL-T13 EL5223CR EL5223CR-T7 EL5223CR-T13 EL5323CL EL5323CL-T7 EL5323CL-T13 EL5323CR EL5323CR-T7 EL5323CR-T13 EL5423CL EL5423CL-T7 EL5423CL-T13 EL5423CR EL5423CR-T7 EL5423CR-T13 PACKAGE 10-Pin MSOP 10-Pin MSOP 10-Pin MSOP 24-Pin LPP 24-Pin LPP 24-Pin LPP 20-Pin TSSOP 20-Pin TSSOP 20-Pin TSSOP 24-Pin LPP 24-Pin LPP 24-Pin LPP 24-Pin TSSOP 24-Pin TSSOP 24-Pin TSSOP 32-Pin LPP 32-Pin LPP 32-Pin LPP 28-Pin TSSOP 28-Pin TSSOP 28-Pin TSSOP TAPE & REEL 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" PKG. NO. MDP0043 MDP0043 MDP0043 MDP0046 MDP0046 MDP0046 MDP0044 MDP0044 MDP0044 MDP0046 MDP0046 MDP0046 MDP0044 MDP0044 MDP0044 MDP0046 MDP0046 MDP0046 MDP0044 MDP0044 MDP0044
* Wireless LANs * Office automation * Active filters * ADC/DAC buffers
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL5123, EL5223, EL5323, EL5423 Pinouts
EL5223 (20-PIN TSSOP) TOP VIEW
32 VIN2 1 VIN1 2 VIN2 3 VIN3 4 VIN4 5 VS+ 6 VS+ 7 VIN5 8 VIN6 9 VIN7 10 VIN8 VOUT1 20 VOUT2 19 VOUT3 18 VOUT4 17 VS- 16 VS- 15 VOUT5 14 VOUT6 13 VOUT7 12 VIN9 8 VOUT8 11 VIN10 9 VIN11 10 VIN12 11 NC 12 NC 13 NC 14 VOUT12 15 VOUT11 16 17 VOUT10 18 VOUT9 31 VIN1
EL5423 (32-PIN LPP) TOP VIEW
27 VOUT1 26 VOUT2 25 VOUT3 24 VOUT4 23 VOUT5 22 VOUT6 Thermal Pad 21 VS20 VOUT7 19 VOUT8
30 NC
29 NC 1 VIN1 2 VIN2 3 VIN3 4 VIN4 5 VIN5 6 VIN6 7 VS+ 8 VS+ 9 VIN7 10 VIN8 11 VIN9 12 VIN1O 13 VIN11 14 VIN12
EL5123 (10-PIN MSOP) TOP VIEW
VIN1 1 VIN2 2 VS+ 3 VIN3 4 VIN4 5 10 VOUT1
VIN3 1 VIN4 2 VIN5 3 9 VOUT2 8 VS7 VOUT3 6 VOUT4 VIN6 4 VS+ 5 VIN7 6 VIN8 7
EL5223 & EL5323 (24-PIN LPP) TOP VIEW
21 VOUT1* 20 VOUT2
EL5323 (24-PIN TSSOP) TOP VIEW
1 VIN1 2 VIN2 19 VOUT3 3 VIN3 VOUT3 22 VOUT4 21 VOUT5 20 VS- 19 VS- 18 VOUT6 17 VOUT7 16 VOUT8 15 VOUT9 14 VOUT10 13 VOUT1 24 VOUT2 23
EL5423 (28-PIN TSSOP) TOP VIEW
VOUT1 28 VOUT2 27 VOUT3 26 VOUT4 25 VOUT5 24 VOUT6 23 VS- 22 VS- 21 VOUT7 20 VOUT8 19 VOUT9 18 VOUT10 17 VOUT11 16 VOUT12 15
23 VIN1*
24 VIN2
VIN3 1 VIN4 2 VIN5 3 VS+ 4 VIN6 5 VIN7 6 VIN8 7 NC 10 VOUT10* 11 CVIN10* 9 VOUT9 12 VIN9 8 Thermal Pad
22 NC
18 VOUT4 4 VIN4 17 VOUT5 5 VIN5 16 VS15 VOUT6 14 VOUT7 13 VOUT8 6 VS+ 7 VS+ 8 VIN6 9 VIN7 10 VIN8 11 VIN9 12 VIN10
* Not available in EL5223
2
28 NC
EL5123, EL5223, EL5323, EL5423
Absolute Maximum Ratings (TA = 25C)
Supply Voltage between V S+ and VS-. . . . . . . . . . . . . . . . . . . .+18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .VS- -0.5V, V S +0.5V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125C Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves ESD Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB R IN C IN AV
VS+ = +5V, V S- = -5V, RL = 10k and CL = 10pF to 0V, T A = 25C unless otherwise specified. DESCRIPTION CONDITION MIN TYP MAX UNIT
Input Offset Voltage Average Offset Voltage Drift Input Bias Current Input Impedance Input Capacitance Voltage Gain
VCM = 0V (Note 1) VCM = 0V
0.5 5 2 1 1.35
12
mV V/C
50
nA G pF
-4.5V VOUT 4.5V
0.99
1.01
V/V
OUTPUT CHARACTERISTICS VOL VOH IOUT (max) Output Swing Low Output Swing High Output Current (Note 2) IL = -5mA IL = +5mA RL = 10 4.85 -4.95 4.95 120 -4.85 V V mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 2.25V to 7.75V No load (EL5123) No load (EL5223) No load (EL5323) No load (EL5423) DYNAMIC PERFORMANCE SR tS BW CS NOTES: 1. Measured over operating temperature range. 2. Instantaneous peak current. 3. Slew rate is measured on rising and falling edges. Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation -4.0V VOUT 4.0V, 20% to 80% (AV = +1), V O = 2V step RL = 10k, CL = 10pF f = 5MHz 7 15 250 12 75 V/s ns MHz dB 55 80 2.4 5.5 6 7.45 3.4 6.8 8.5 10.1 dB mA mA mA mA
3
EL5123, EL5223, EL5323, EL5423
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCV OS IB RIN CIN AV Input Offset Voltage Average Offset Voltage Drift Input Bias Current Input Impedance Input Capacitance Voltage Gain 0.5V VOUT 4.5V 0.99 VCM = 2.5V (Note 1) VCM = 2.5V 0.5 5 2 1 1.35 1.01 50 12 mV V/C nA G pF V/V VS+ =+5V, VS- = 0V, RL = 10k and CL = 10pF to 2.5V, T A = 25C unless otherwise specified. CONDITION MIN TYP MAX UNIT
DESCRIPTION
OUTPUT CHARACTERISTICS VOL VOH IOUT (max) Output Swing Low Output Swing High Output Current (Note 2) IL = -2.5mA IL = +2.5mA RL = 10 4.85 80 4.92 120 150 mV V mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 4.5V to 15.5V No load (EL5123) No load (EL5223) No load (EL5323) No load (EL5423) DYNAMIC PERFORMANCE SR tS BW CS NOTES: 1. Measured over operating temperature range. 2. Instantaneous peak current. 3. Slew rate is measured on rising and falling edges Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation 1V VOUT 4V, 20% to 80% (AV = +1), VO = 2V step RL = 10k, CL = 10pF f = 5MHz 12 250 12 75 V/s ns MHz dB 55 80 2.4 5.2 5.8 7.2 3.2 6.5 8 9.7 dB mA mA mA mA
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCV OS IB RIN CIN AV
VS+ = +15V, VS- = 0V, RL = 10k and CL = 10pF to 7.5V, TA = 25C unless otherwise specified. DESCRIPTION CONDITION MIN TYP MAX UNIT
Input Offset Voltage Average Offset Voltage Drift Input Bias Current Input Impedance Input Capacitance Voltage Gain
VCM = 7.5V (Note 1) VCM = 7.5V
0.5 5 2 1 1.35
14
mV V/C
50
nA G pF
0.5V VOUT 14.5V
0.99
1.01
V/V
OUTPUT CHARACTERISTICS VOL VOH IOUT (max) Output Swing Low Output Swing High Output Current (Note 2) IL = -7.5mA IL = +7.5mA RL = 10 14.85 120 80 14.95 200 150 mV V mA
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EL5123, EL5223, EL5323, EL5423
Electrical Specifications
PARAMETER POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 4.5V to 15.5V No load (EL5123) No load (EL5223) No load (EL5323) No load (EL5423) DYNAMIC PERFORMANCE SR tS BW CS NOTES: 1. Measured over operating temperature range. 2. Instantaneous peak current. 3. Slew rate is measured on rising and falling edges. Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation 1V VOUT 14V, 20% to 80% (AV = +1), VO = 2V step RL = 10k, C L = 10pF f = 5MHz 18 250 12 75 V/s ns MHz dB 55 80 2.4 5.7 6.2 7.8 3.7 7.1 8.7 10.4 dB mA mA mA mA VS+ = +15V, VS- = 0V, RL = 10k and CL = 10pF to 7.5V, TA = 25C unless otherwise specified. DESCRIPTION CONDITION MIN TYP MAX UNIT
5
EL5123, EL5223, EL5323, EL5423 Typical Performance Curves
Output Swing vs Frequency 12 10 8 VOP-P (V) 6 4 2 0 10k VS = 5V RL = 10k THD + Noise (%) 0.018 0.016 0.014 0.012 0.01 0.008
Total Harmonic Distortion + Noise vs Frequency
VS = 5V RL = 10k VIN = 2VP-P
100k
1M
10M
0.006 1k
10k Frequency (Hz)
100k
Frequency (Hz) Overshoot vs Load Capacitance 80 70 60 Overshoot (%) 50 40 30 20 10 0 10 100 Capacitance (pF) Frequency Response for Various CL 20 Normalized Magnitude (dB) Normalized Magnitude (dB) VS = 5V R L = 10k 10 100pF 0 47pF -10 12pF 1000pF 10 20 VS = 5V C L = 10pF 1k VS=5V VS = 5V R L=10k RL = 10k VIN =100m VIN = 100mV Step Size (V) 10 8 6 4 2 0 -2 -4 -6 -8 -10 200 250 300 VS = 5V RL = 10k CL = 12pF
Settling Time vs Step Size
350 400
450
500 550
600
650
Settling Time (ns) Frequency Response for Various RL
10k 1k
0
-10
150 562
-20
-20
-30 100k
1M
10M
100M
-30 100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
6
EL5123, EL5223, EL5323, EL5423 Typical Performance Curves
(Continued)
PSRR vs Frequency 100 PSRR+ 80 PSRR (dB) PSRRVS = 5V Output Impedance () 480 600
Output Impedance vs Frequency VS = 5V TA = 25C
60
360
40
240
20
120
0 1k
10k
100k Frequency (Hz)
1M
10M
0 100k
1M
10M
100M
Frequency (Hz) Input Offset Voltage Distribution 25
Input Noise Special Density vs Frequency
100 Voltage Noise (nV/Hz) 20 % of Buffers 100k 1M Frequency (Hz) Input Bias Current vs Temperature 2.5 VS = 5V Output High Voltage (V) Input Bias Current (nA) 1.5 4.95 4.945 4.94 4.935 4.93 4.925 -35 -15 5 25 45 65 85 -35 -15 5 25 45 65 85 Temperature (C) Temperature (C) 4.955 VS = 5V IOUT = 5mA 10M 100M
15
10
10
5
-6
-4
-2
1 10k
0 0 2 4 Input Offset Voltage (mV) Output High Voltage vs Temperature 6
0.5
-0.5
-1.5
-2.5
7
EL5123, EL5223, EL5323, EL5423 Typical Performance Curves
(Continued)
Slew Rate vs Temperature 15.1 VS = 5V Output Low Voltage (V) 14.9 Slew Rate (V/s) -4.938 -4.934
Output Low Voltage vs Temperature VS = 5V IOUT = -5mA
14.7
-4.942
14.5
-4.946
14.3
-4.95
14.1 -35 -15 5 25 45 65 85 Temperature (C) Voltage Gain vs Temperature 1.001 VS = 5V Supply Current (mA) 1.001
-4.954 -35 -15 5 25 45 65 85 Temperature (C) Supply Current per Channel vs Temperature
0.66
VS = 5V
Voltage Gain (V/V)
0.65
1.000
0.64
1
0.63
0.999 -35 -15 5 25 45 65 85 Temperature (C) Supply Current per Channel vs Supply Voltage 0.71 0.7 Supply Current (mA) 0.69 0.68 0.67 0.66 0.65 0.64 0.63 4 6 8 10 12 14 16 18 TA = 25C
0.62 -35 -15 5 25 45 65 85 Temperature (C) Small Signal Transient Response VS = 5V RL = 10k CL = 12pF
50mV/div
200ns/div
Supply Voltage (V)
8
EL5123, EL5223, EL5323, EL5423 Typical Performance Curves
(Continued)
Package Power Dissipation vs Ambient Temperature JEDEC JESD51-7 High Effective Thermal Conductivity (4-layer) Test Board, LPP exposed diepad soldered to PCB per JESD51-5 2.857W
Large Signal Transient Response 3
2.5 2.703W Power Dissipation (W)
LP P3
2 1.5 1 0.5 0
2= C 35
LP P2
37 4=
1V/div
/W
C /W
1s/div
0
25
50
75 85 100
125
150
Ambient Temperature (C) Package Power Dissipation vs Ambient Temperature JEDEC JESD51-7 High Effective Thermal Conductivity Test Board 1.4 1.2 Power Dissipation (W) 1 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 Ambient Temperature (C) Package Power Dissipation vs Ambient Temperature JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board 0.9 0.8 Power Dissipation (W) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 Ambient Temperature (C) TSSOP24 TSSOP24 JA=128C/ =128C/W TSSOP20 JA =140C/W 714mW 833mW 781mW Power Dissipation (W) TSSOP28 JA=120C/W 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 Ambient Temperature (C) Package Power Dissipation vs Ambient Temperature JEDEC JESD51-3 and SEMI G42-88 (Single Layer) Test Board 0.8 758mW 0.7 Power Dissipation (W) 714mW 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 150 Ambient Temperature (C) LPP24 140C/W LPP32 132C/W
M SO P1 11 5 0 C/ W
1.333W 1.176W 1.111W TSSOP24 JA =85C/W Power Dissipation (W)
0.6 0.5 0.4 0.3 0.2 0.1 0
Package Power Dissipation vs Ambient Temperature JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board 486mW
TSSOP28 JA =75C/W TSSOP20 JA =90C/W
MS OP 20 10 6 C/ W
0
25
50
75 85
100
125
Ambient Temperature (C) Package Power Dissipation vs Ambient Temperature JEDEC JESD51-7 High Effective Thermal Conductivity Test Board 870mW
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EL5123, EL5223, EL5323, EL5423 Applications Information
Product Description
The EL5123, EL5223, EL5323, and EL5423 unity gain buffers are fabricated using a high voltage CMOS process. It exhibits rail-to-rail input and output capability and has low power consumption (600A per buffer). These features make the EL5123, EL5223, EL5323, and EL5423 ideal for a wide range of general-purpose applications. When driving a load of 10k and 12pF, the EL5123, EL5223, EL5323, and EL5423 have a -3dB bandwidth of 12MHz and exhibits 15V/s slew rate.
Output Phase Reversal
The EL5123, EL5223, EL5323, and EL5423 are immune to phase reversal as long as the input voltage is limited from VS- -0.5V to VS+ +0.5V. Figure 2 shows a photo of the output of the device with the input voltage driven beyond the supply rails. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diodes placed in the input stage of the device begin to conduct and overvoltage damage could occur.
1V 10s
Operating Voltage, Input, and Output
The EL5123, EL5223, EL5323, and EL5423 are specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range of 4.5V to 16.5V. Most EL5123, EL5223, EL5323, and EL5423 specifications are stable over both the full supply range and operating temperatures of -40C to +85C. Parameter variations with operating voltage and/or temperature are shown in the typical performance curves. The output swings of the EL5123, EL5223, EL5323, and EL5423 typically extend to within 50mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 1 shows the input and output waveforms for the device. Operation is from 5V supply with a 10k load connected to GND. The input is a 10V P-P sinusoid. The output voltage is approximately 9.985V P-P.
5V 10s VS = 5V TA = 25C VIN = 10VP-P
1V
VS=2.5V TA=25C VIN =6VP-P
FIGURE 2. OPERATION WITH BEYOND-THERAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5123, EL5223, EL5323, and EL5423 buffer, it is possible to exceed the 125C "absolute-maximum junction temperature" under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the buffer to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to:
T JMAX - T AMAX PDMAX = -------------------------------------------d JA
Input
where:
Output
TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature
5V
FIGURE 1. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT
JA = Thermal resistance of the package PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or:
PDMAX = i [ V S x I SMAX + ( VS + - VO U T i ) x ILOAD i ]
Short Circuit Current Limit
The EL5123, EL5223, EL5323, and EL5423 will limit the short circuit current to 120mA if the output is directly shorted to the positive or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such that the device may be damaged. Maximum reliability is maintained if the output continuous current never exceeds 30mA. This limit is set by the design of the internal metal interconnects.
when sourcing, and
P DMAX = i [ V S x ISMAX + ( V OUT i - V S - ) x ILOAD i ]
10
EL5123, EL5223, EL5323, EL5423
when sinking. where: i = 1 to Total number of buffers VS = Total supply voltage ISMAX = Maximum quiescent current per channel VOUTi = Maximum output voltage of the application ILOAD i = Load current If we set the two PDMAX equations equal to each other, we can solve for R LOADi to avoid device overheat. The package power dissipation curves provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous equation, it is a simple matter to see if PDMAX exceeds the device's power derating curves.
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible, and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the V S- pin is connected to ground, a 0.1F ceramic capacitor should be placed from VS+ pin to ground. A 4.7F tantalum capacitor should then be connected from V S+ pin to ground. One 4.7F capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used.
Unused Buffers
It is recommended that any unused buffer have the input tied to the ground plane.
Driving Capacitive Loads
The EL5123, EL5223, EL5323, and EL5423 can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The buffers drive 10pF loads in parallel with 10k with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5 and 50) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150 and 10nF are typical. The advantage of a snubber is that it does not draw any DC load current or reduce the gain.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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